Ranjan Lamichhane

Graduate Research Assistant

University of Arkansas•  August 2011 - October 2013

• Designed a high-efficiency silicon-carbide integrated gate buffer with out-of-the-box circuit topology using Virtuoso, which reduced rise/fall time of the output by 50% and power consumption by 80%. o 2014 R&D 100 Award for one of the 100 most significant high-technology products introduced that year • Designed, tested, and debugged analog/digital/mixed-signal integrated circuits including data converters, signal generation, and signal processing circuits. • Wrote scripts to run Monte-Carlo simulation to find optimal transistor sizes for gate buffer. • Employed various tools such as oscilloscope, probe station, and signal generator to perform lab duties.