Wei Yet Ng

Digital Design Engineer

Qualcomm•  August 2021 - Present

Qualcomm is a multinational corporation known for designing and manufacturing semiconductors and wireless telecommunications products. PMIC digital design team Verilog; Tcl; Perl; CDC; Lint; Synthesis; STA; LEC SimVision, SpyGlass, Design Compiler; Conformal

Digital Design Engineer Intern / FYP Student

Nanyang Technological University•  June 2020 - June 2021

Final Year Project (Graded A+) under Zero-Error System Pte Ltd, an NTU spin-off fabless IC design company that designs ultra-low error space-grade chips for space applications and autonomous vehicles. • Design an RHBD I2C Controller from scratch for low earth orbit satellites based on a 65nm Global Foundries CMOS process. - Design from scratch: AHB to Wishbone bridge, wishbone interconnect, I2C master, I2C slave, Memory wrapper, TMR - IP used: ARM cortex-M0, CMOS10LPe ARM® Logic IP (SRAM) • Integrate the RHBD I2C controller into ARM cortex-M0. • Work closely with RHBD standard cells RnD team to complete the design flow from RTL to GDS which includes synthesis, RHBD cell replacement, and physical design. • Simulate and analyze the timing, power, area of the design to evaluate the performance of the RHBD standard cells. Verilog; Synthesis; STA; Power Analysis; Physical Design; Tcl-tk scripting; C programming VCS; Design compiler; Library compiler; Innovus; Keiluvision; Memory compiler

Static Timing Analysis Engineer Intern

Mediatek Singapore•  January 2020 - June 2020

MediaTek is a global fabless IC design company that designs chips for wireless communications, smartphones, tablets etc. • Implementation on flow development using Perl, TCL, Python. • Create a Python Script on automation of handling PrimeTime Timing Reports and sorting glitched Pins hierarchically. • Create an Innovus Tcl-tk script for verifying and marking the off-tracked signal pins. • Perform basic timing analysis using PrimeTime. • Acquire the knowledge of basic VLSI flow and STA. • Awarded an offer of MediaTek Scholarship and certificate of Distinction for Professional Internship from NTU STA; Linux; Tcl-tk; Python Primetime

Nanyang Technological University (NTU), Singapore

Electrical and Electronic Engineering (IC Design), BE•  August 2018 - June 2021

AY 17/18, 18/19, 19/20, 20/21 Dean List; 2019 Design and Innovation Project Champion; Motorola Book Prize (VLSI System); Motorola Book Prize (Advanced Analog Circuit); Final Year Project A+; NTU class of 1985 Scholarship; NTU president research scholar (URECA) Related courses: Integrated Electronics, Circuit Analysis, Digital Electronics, Semiconductor Device and Processing, Semiconductor Fundamental, Advanced Analog Electronics, VLSI system, Mixed-Signal IC Design, Radio Frequency Circuit and Integrated System Design, Data Structure and Algorithm, Computing, Microprocessors.