K Krishna Vamshi

INTERN

NIELIT•  August 2024 - October 2024

Participated in the Online Internship in RTL design using Verilog HDL Language Program organized by Dr. Chandralakha R from NIELIT Chennai. Designed a program that implements the Counters circuit using Verilog HDL Language in the Xilinx VIVADO Tool.

INTERN

Entuple Technologies•  June 2024 - July 2024

Participated in the Physical Design and Verification Internship Program organized by Abhiyanta, the training arm of Entuple Technologies. Useful for VLSI Beginners to understand the concepts of the Physical design and Verification of the IC Circuits.

INTERN

NIELIT•  May 2024 - June 2024

Participated in the VLSI for Beginners Internship Program organized by Dr. Sreejeesh SG from NIELIT Calicut. Designed a program that implements the 4 bit carry adder circuit using Verilog HDL Language. Performed an analysis on the designed program using Xilinx VIVADO Tool.

INTERN

MathWorks•  May 2023 - September 2023

Participated in the MathWorks Virtual Internship Program on Getting Started with Artificial Intelligence organized by AICTE Internship Program and Supported by the MATHWORKS TEAM. Designed a program that visualizes the concepts of Artificial Intelligence using MATLAB Tool.

INTERN

Core EL Technologies•  May 2023 - July 2023

Participated in the XILINX SOC Design Flow Internship Program organized by Sandeepani School of Embedded Systems, the training arm of Core EL Technologies. Designed a program that implements the Booth’s Multiplier Algorithm Using Verilog HDL Language. Performed an analysis on the designed program using Xilinx VIVADO Simulation Tool.